[Dspforum] More troubles with lab 6

[Ryan Merton]

Doug,

Remember how we figured out that my problem last night was related to
the bit reversal indexing?  It wasn't.  I went home, and I did in fact
call the routine with the correct parameters to begin with.
Breakpointing around the FFT and saving data along the way leads me to
see no problem at all.  Only after I remove the breakpoints and let it
go freerunning do things start to mess up.

Is there some magic we have to configure to get the SDRAM timings
right, or DMA configuration registers aside from the QDMA registers?

I breakpointed after bringing the time domain data in from ext ram,
after the FFT and bit reversal, and after the FFT data is stored off
to RAM.  At each of those steps for the first 7 FFTs I saved the
contents of external RAM.  It all looks fine.  I got tired of it,
removed the breakpoints, and let it run, then dumped it all at the
end... and starting at about the 13th FFT the FFT data is not right.
The time domain data remains intact.  If I do the first 3 FFTs and let
it go free running, it messes up around the 6th or 7th FFT.

Any ideas?  I am using this to wait for the DMA to finish:  while
(!(EDMA_getPriQStatus() & EDMA_OPT_PRI_HIGH));
I stole that line right from the CSL user's guide.  I am tempted to
put something like for(x=0;x<10000000;x++){blah=sin(x);} and see if it
works then.

Thanks,
Ryan