[Dspforum] CIPR question

[Wenstrand, Doug S.]

Also, those EDMA_FMK macros are very nice for this - rather than having the raw hex in your code, you get to spell out exactly what each bit means.  It sure makes it easier to read/change.

From: dspforum-bounces at echelonembedded.com [mailto:dspforum-bounces at echelonembedded.com] On Behalf Of O'Connor, Sean R.
Sent: Tuesday, November 03, 2009 10:21 AM
To: dspforum at echelonembedded.com
Subject: [Dspforum] CIPR question

Setting the OPT registers for ping and pong to 0x20320002 and 0x20310002 should set CIPR to 2 and 1 when the transfers have completed, I think.  CIPR is actually getting set to 6 and 4 respectively, and if I use 6 and 4 as my masks things seem to operate as expected (at least ping and pong get updated and waitfordma() does not hang).  To my knowledge the OPT register is the only register that can effect the CIPR... so this discrepancy is confusing to me.  Any thoughts?

Thanks,
Sean

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