[Dspforum] Lab 6 Questions

[Alan Ding]

Thanks Doug.

I'm also having a tough time locating register definitions from the lecture
notes:

CIPR
QOPT...etc.

I found the macros in csl_edmahal.h which was not part of the example
project.

~Alan

On Sun, Oct 18, 2009 at 7:39 PM, Doug Wenstrand <doug at echelonembedded.com>wrote:

> Yea, I forgot to time it and fill in the requirement.  Your presumption of
> course is correct -- We want you to use QDMA to do it efficiently, but you
> need not worry about overlapping the transfers with computations.
> So -- the following pseudocode is what would meet the timing requirement:
>
> loop:
> dma data in
> wait for it
> fft
> dma data out
>
>
> On Sun, Oct 18, 2009 at 6:46 PM, Alan Ding <alan33d at gmail.com> wrote:
>
>> For the requirements on the back of the lab, it states that our STFT "must
>> take less than xx ms".  What exactly is xx?  ~1.7ms*100 or ~48ms*100?  I
>> take it you guys want us to get roughly the first timing requirement using
>> QDMA.
>>
>> When we first capture the data in ext ram from CCS.  The instructions
>> wants us to create a plot of this data in CCS.  How do you do that?  Should
>> we use the Graph function under the view tab?  What options should we use
>> for it?
>>
>> Thanks,
>>
>> --
>> -------------------------------------------------------
>> Alan Ding
>> Master of Sci, Electrical Engineering
>> Johns Hopkins University
>>
>> Email: alan33d at gmail.com
>> Contact #: 4844593290
>>
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>>
>
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>


-- 
-------------------------------------------------------
Alan Ding
Master of Sci, Electrical Engineering
Johns Hopkins University

Email: alan33d at gmail.com
Contact #: 4844593290
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